Sr. FPGA Design Engineer

FPGA Design Engineer responsible for FPGA architecture, VHDL development, verification, timing analysis, hardware bring-up, and HW/SW integration testing.

Job Requirements

• Bachelor’s, Master’s, or PhD degree in Engineering, Engineering Technology, Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, Mathematics, Physics, Chemistry, Data Science, or a related technical field

• 5–7+ years of experience designing FPGA-based products using VHDL

• Experience with Xilinx FPGAs

• Experience with Vivado

• Experience with RTL development and module-level simulation

• Experience with synthesis, Place and Route (PAR), and Static Timing Analysis (STA)

• Experience with Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC), and static formal EDA tools

• Experience developing verification test plans and performing end-to-end simulations

• Experience with FPGA and board bring-up

• Experience with hardware/software integration testing

• Experience using test equipment for design validation

• Experience with revision control systems

• Experience with Earned Value Management (EVM)

• Active DoD security clearance

• U.S. citizenship required

• Ability to pass a background check

Preferred Skills

• Experience mapping algorithms to FPGA architectures

• C++ object-oriented programming experience

• Experience with Ethernet, TCP/IP, PCIe, NVMe, or USB protocols

• Experience with Xilinx SoC design

• Experience with Xilinx SDKs

• Experience with PetaLinux

• Experience with High-Level Synthesis (HLS)

• Experience with Vivado HLX or Mentor Catapult

• Experience supporting NSA certification activities

Job Responsibilities

• Derive FPGA design specifications from system requirements

• Develop detailed FPGA architectures for implementation

• Implement FPGA designs in RTL using VHDL

• Perform module-level simulations

• Execute synthesis, Place and Route, and Static Timing Analysis

• Perform RTL quality analysis using Lint, RDC, CDC, and static formal verification tools

• Develop verification test plans

• Perform end-to-end FPGA simulations

• Support FPGA and board bring-up activities

• Validate designs through hardware/software integration testing

• Perform design validation using laboratory test equipment

• Support technical documentation and product collateral required for NSA certification

• Maintain FPGA design files and revisions using configuration and revision control systems

Pay: 51-69/hr

Benefit offerings include medical, dental, vision, term life insurance, short-term disability insurance, additional voluntary benefits, commuter benefits and 401K plan. Our program provides employees the flexibility to choose the type of coverage that meets their individual needs. Available paid leave may include Paid Sick Leave, where required by law; any other paid leave required by Federal, State or local law; and Holiday pay upon meeting eligibility criteria. Disclaimer: These benefit offerings do not apply to client-recruited jobs and jobs which are direct hire to a client.

Pay Details: $51.00 to $69.00 per hour

Benefit offerings available for our associates include medical, dental, vision, life insurance, short-term disability, additional voluntary benefits, EAP program, commuter benefits and a 401K plan. Our benefit offerings provide employees the flexibility to choose the type of coverage that meets their individual needs. In addition, our associates may be eligible for paid leave including Paid Sick Leave or any other paid leave required by Federal, State, or local law, as well as Holiday pay where applicable.

Equal Opportunity Employer/Veterans/Disabled

Military connected talent encouraged to apply

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• The California Fair Chance Act
• Los Angeles City Fair Chance Ordinance
• Los Angeles County Fair Chance Ordinance for Employers
• San Francisco Fair Chance Ordinance

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