FPGA ASIC Design Engineer

FPGA / ASIC Development Engineer responsible for designing, simulating, verifying, integrating, and testing high-speed digital systems, DSP architectures, and FPGA-based platforms.

Job Requirements

• Experience with FPGA and/or ASIC development.

• Experience with FPGA design tools including Xilinx Vivado, Intel Quartus, or Synopsys Synplify.

• Proficiency with SystemVerilog.

• Experience with HDL simulators, waveform viewers, and coverage tools.

• Experience with digital signal processing (DSP) implemented on FPGA platforms.

• Experience with high-speed digital design.

• Experience with high-speed communication interfaces and networking concepts.

• Experience with system-on-chip (SoC) architectures implemented on FPGA platforms.

• Experience with embedded processors and COTS-based control platforms.

• Familiarity with hardware-in-the-loop (HIL) test setups.

• Experience using JTAG, logic analyzers, and related digital test equipment.

• Experience with version control systems and configuration management.

• Experience with FPGA integration and hardware testing.

Preferred Skills

• Proficiency with UVM.

• Proficiency with C.

• Experience developing automated FPGA test or development scripts.

• Experience with ASIC design or verification.

• Experience with FPGA-based embedded processing architectures.

• Experience with complex high-speed networking systems.

• Experience supporting technical development of junior FPGA or digital design engineers.

• Experience integrating FPGA designs with RF, analog, digital, or system-level architectures.

Job Responsibilities

• Develop FPGA and ASIC solutions for research and development programs.

• Design and implement digital signal processing architectures on FPGA platforms.

• Develop high-speed digital communication and networking interfaces.

• Implement system-on-chip architectures using FPGA-based embedded processors.

• Perform RTL design using SystemVerilog.

• Simulate and verify FPGA and ASIC designs using HDL simulation and coverage tools.

• Develop and execute hardware-in-the-loop test strategies.

• Integrate FPGA designs with embedded processors, control platforms, and external hardware.

• Perform debugging using JTAG, logic analyzers, waveform viewers, and related test tools.

• Develop scripts and automation tools to improve FPGA development and verification efficiency.

• Support FPGA build, synthesis, place-and-route, and implementation activities.

• Maintain design baselines using version control and configuration management systems.

• Support system integration and testing of complex high-speed digital products.

• Coordinate technical interfaces with systems, RF, analog, digital, and FPGA/ASIC engineering functions.

• Provide technical direction and support for junior engineers.

Pay: 75-80/hr

Benefit offerings include medical, dental, vision, term life insurance, short-term disability insurance, additional voluntary benefits, commuter benefits and 401K plan. Our program provides employees the flexibility to choose the type of coverage that meets their individual needs. Available paid leave may include Paid Sick Leave, where required by law; any other paid leave required by Federal, State or local law; and Holiday pay upon meeting eligibility criteria. Disclaimer: These benefit offerings do not apply to client-recruited jobs and jobs which are direct hire to a client.

Pay Details: $75.00 to $80.00 per hour

Benefit offerings available for our associates include medical, dental, vision, life insurance, short-term disability, additional voluntary benefits, EAP program, commuter benefits and a 401K plan. Our benefit offerings provide employees the flexibility to choose the type of coverage that meets their individual needs. In addition, our associates may be eligible for paid leave including Paid Sick Leave or any other paid leave required by Federal, State, or local law, as well as Holiday pay where applicable.

Equal Opportunity Employer/Veterans/Disabled

Military connected talent encouraged to apply

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• Los Angeles City Fair Chance Ordinance
• Los Angeles County Fair Chance Ordinance for Employers
• San Francisco Fair Chance Ordinance

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